Senior Mixed Signal ASIC Design Engineer at Tokyo Electron US
Salt Lake City, Utah, United States
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Summary
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Senior
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Top School
Alec Adair is a senior mixed-signal ASIC design engineer at Tokyo Electron US, delivering analog and digital flows from specification to tape-out across 12nm, 14nm, and 16nm FinFET nodes. He holds a BS in Computer Engineering and an MS in Electrical and Computer Engineering from the University of Utah, with roughly nine years of full-lifecycle IC design experience. His background spans roles at Nordic Semiconductor as an Analog R&D Engineer and earlier software-focused positions, highlighting a rare blend of hardware design and software automation. He's the author of ROAR—Robust Optimal Analog Reuse—an open-source analog design flow built around C/ID methodology and open-source tools and PDKs to automate analog design. Based in Salt Lake City, Alec continues to collaborate with the University of Utah's LCAS group, combining academic research with industry practice to push analog IC automation forward.
Contributions:25 pushes, 1 branch in 1 year 3 months
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