Cuong Le is a principal design verification engineer with a decade of experience delivering complex SoC verification and embedded software for automotive and high-speed networking. Based in San Jose, California, he currently leads design verification at Marvell Technology, applying UVM/SystemVerilog and SystemC to verify RDMA/NVMe IP and full-chip platforms, coordinating with remote teams including Marvell Israel. He blends verification and design expertise, hands-on in Verilog, SystemC, UVM, and C/C++, and also builds embedded software stacks—Linux kernel, U-Boot, and device drivers for automotive controllers (CAN, KW2000). His career includes roles at Qualcomm and Marvell where he defined verification plans, developed UVM-based testbenches, and drove coverage and debugging for RoCEv2/Infiniband RDMA IP and NVMe IP. He has contributed to industry standards through Accellera as a Technical Contributor and has early hands-on automotive firmware experience building Linux-based firmware for Honda/Subaru controllers. He earned an honors bachelor's degree in Computer Engineering from Ho Chi Minh University of Technology, pairing strong mathematical foundations with practical production-grade verification and firmware execution.
10 years of coding experience
11 years of employment as a software developer
Mathematics, 8.4/10, Mathematics, 8.4/10 at Luong Van Chanh high school for the gifted
Honor Bachelor's degree, Computer Engineering, 8.33/10, Honor Bachelor's degree, Computer Engineering, 8.33/10 at Ho Chi Minh University of Technology
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