Cuong Le

Principal Design Verification Engineer

San Jose, California, United States
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Summary

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Cuong Le is a principal design verification engineer with a decade of experience delivering complex SoC verification and embedded software for automotive and high-speed networking. Based in San Jose, California, he currently leads design verification at Marvell Technology, applying UVM/SystemVerilog and SystemC to verify RDMA/NVMe IP and full-chip platforms, coordinating with remote teams including Marvell Israel. He blends verification and design expertise, hands-on in Verilog, SystemC, UVM, and C/C++, and also builds embedded software stacks—Linux kernel, U-Boot, and device drivers for automotive controllers (CAN, KW2000). His career includes roles at Qualcomm and Marvell where he defined verification plans, developed UVM-based testbenches, and drove coverage and debugging for RoCEv2/Infiniband RDMA IP and NVMe IP. He has contributed to industry standards through Accellera as a Technical Contributor and has early hands-on automotive firmware experience building Linux-based firmware for Honda/Subaru controllers. He earned an honors bachelor's degree in Computer Engineering from Ho Chi Minh University of Technology, pairing strong mathematical foundations with practical production-grade verification and firmware execution.
code10 years of coding experience
job11 years of employment as a software developer
bookMathematics, 8.4/10, Mathematics, 8.4/10 at Luong Van Chanh high school for the gifted
bookHonor Bachelor's degree, Computer Engineering, 8.33/10, Honor Bachelor's degree, Computer Engineering, 8.33/10 at Ho Chi Minh University of Technology
languagesEnglish, Vietnamese
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Github Skills (7)

alu10
methodology6
uvm5
verification5
co-simulation3
qemu2
systemc1

Programming languages (1)

C++

Github contributions (5)

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This is full tutorial of UVM (Universal Verification Methodology) for a simple ALU unit
Contributions:19 commits in 19 days
universal-verification-methodologyunitmethodologyaluverification
hcuongvn/simple-alu-uvm

Jul 2018 - Jun 2019

Contributions:16 pushes, 1 branch in 11 months
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Cuong Le - Principal Design Verification Engineer