Preeti S is a Post Silicon Validation Engineer with 9 years of experience in design and verification of complex semiconductor systems, currently at HCLTech in Bengaluru. She brings deep expertise in pre- and post-silicon validation, device enumeration, PCIe, SPI Flash, JTAG, and firmware-driven BIOS feature validation, including DDR5 memory validation using RAS tools. Her career spans Intel (pre-silicon validation collaboration to boost device reliability) and Maven Silicon (design and verification of Router1X3 as part of a robust TB architecture with active source/destination agents and scoreboard-driven verification). She leverages EDA tools such as ModelSim, QuestaSim, and Quartus Prime to develop verification plans, implement tests, and achieve target coverage. She holds an MTech in Electronics and Communications Engineering and a BE in ECE, with a focus on Design and Verification from Maven Silicon Institute, underpinning a solid theoretical and practical grounding. Based in Bengaluru, she combines hands-on hardware validation with a practical, test-automation mindset to advance semiconductor technologies.
9 years of coding experience
2 years of employment as a software developer
Master of Technology - MTech, Electronics and Communications Engineering, 9.03, Master of Technology - MTech, Electronics and Communications Engineering, 9.03 at B. M. S. College of Engineering
Bachelor of Engineering - BE, Electronics and Communications Engineering, Bachelor of Engineering - BE, Electronics and Communications Engineering at Visvesvaraya Technological University
Design and Verification, Design and Verification at Maven Silicon Institute
A repository for the Cardiff School of Mathematics Code Club
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