Summary
Rohit Kulkarni is an ASIC Design Engineer with nine years of industry experience, currently shaping next-generation silicon at Meta. He has advanced expertise in Verilog, SystemVerilog, C, and Python, and is proficient with ModelSim, QuestaSim, and Xilinx tools for design and verification. His career spans senior roles at Qualcomm as a Digital Design Engineer and Staff Engineer, and a recent transition to Meta where he leads ASIC development. He brings a strong foundation from research at UC San Diego on GHz-wide spectrum sensing and data compression, and earlier hands-on FPGA/RTL work in 5G TBS and GPU verification. Based in San Diego, he earned an MS in Electrical and Computer Engineering from UCSD and a BE with honors from BITS Pilani, blending academia with practical, scalable silicon delivery. He combines design, verification, and a curiosity-driven approach to solve complex digital design challenges.
9 years of coding experience
Master's Degree, Computer Science, Master's Degree, Computer Science at University of Southern California
Bachelor's Degree, Computer Engineering, Bachelor's Degree, Computer Engineering at Pune Institute of Computer Technology
English