Karol Gugala
Engineering Manager at Antmicro
Greater Poland Voivodeship
Summary
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Rockstar🎓
Top SchoolKarol Gugala is an Engineering Manager with 12 years of experience leading embedded systems, FPGA and tooling teams at Antmicro while keeping a hands-on engineering mindset. He contributes to high-profile open-source projects—LiteX (AXI4 and VexRiscv debug), prjxray (Xilinx 7-series minitests and fuzzers), edalize, and documentation work for Google’s SkyWater PDK—bridging silicon, toolchain automation and developer experience. Based in Greater Poland with a master’s in Automation and Robotics, he progressed from research and embedded engineer to team lead and manager, retaining deep hardware-software fluency. Pragmatic about reproducibility and compliance, he focuses on making FPGA flows more portable, debuggable and usable for other engineers.
13 years of coding experience
11 years of employment as a software developer
Master's degree, Automation and Robotics, Master's degree, Automation and Robotics at Poznan University of Technology
Polish, English
Stackoverflow
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Github Skills (41)
hardware-designs10
verilog10
documentations10
xilinx10
systemverilog10
python10
axi410
synthesis10
yosys10
spi10
hardware10
vhdl10
lit10
flash10
lite-server10
Programming languages (24)
Github contributions (5)
f4pga/prjxray
Jan 2019 - Oct 2022
Documenting the Xilinx 7-series bit-stream format.
Role in this project:
Embedded Systems Engineer / FPGA Developer
Embedded Systems Engineer / FPGA DeveloperContributions:7 reviews, 143 commits, 78 PRs in 3 years 10 months
Contributions summary:Karol primarily contributed to the `prjxray` repository by implementing and refining minitests and fuzzers specifically tailored for Xilinx FPGAs. Their work involved modifying Tcl scripts for design and routing, creating and adapting Python scripts for generating test designs, and altering build configurations. The user also focused on adapting the system to use different FPGA targets like the ZYBO-Z7 and refactoring fuzzer designs.
vivadoartix7xilinxsymbiflowxilinx-fpga
olofk/edalize
Oct 2019 - Jun 2020
An abstraction library for interfacing EDA tools
Role in this project:Back-end Developer & Automation Engineer
Back-end Developer & Automation EngineerContributions:1 review, 12 commits, 8 PRs in 7 months
Contributions summary:Karol primarily contributed to enhancing the `edalize` library's support for various EDA tools, particularly Vivado and Icestorm. They added features like version retrieval for Vivado and implemented automation improvements such as forcing project creation and bitstream writing. The contributions also include adding timing and stats targets to the Icestorm flow, and refactoring the icestorm implementation to use Yosys wrappers.
vivadovhdlxilinxsystemverilogsynthesis
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