Summary
Stella Mao is a Verification Engineer based in the New York City metropolitan area with a decade of experience in digital design and verification. Since 2021 she has been shaping Huawei's verification efforts, combining real-time debugging with hardware-friendly methodologies. Earlier, at Columbia University she designed a 64-tap, 16-bit FIR core in Verilog and used MATLAB for algorithm simulation and coefficient generation, validating results with NRMSE. Her earlier research at Southeast University focused on high-frequency, low-phase-noise PLL frequency synthesizers, including Cadence schematic and layout work. She holds an MSEE from Columbia University and a BE in Information Engineering from Southeast University, reflecting a strong foundation in both theory and hands-on hardware design. Her profile hints at a practical, production-oriented approach with a passion for translating complex RF/DSP concepts into verifiable engineering solutions.
10 years of coding experience
1 year of employment as a software developer
Bachelor of Engineering - BE, Information Engineering, Bachelor of Engineering - BE, Information Engineering at Southeast University
MSEE, Electrical Engineering, MSEE, Electrical Engineering at Columbia University in the City of New York