Aleš Svetek
Founder And CEO at AddigiSys
Slovenia
Summary
👤
Senior🎓
Top SchoolAleš Svetek is a seasoned hardware-software founder and engineer with over a decade of experience delivering high-speed FPGA-based embedded systems. As Founder and CEO of AddigiSys since 2017, he leads product development at the intersection of HW/SW co-design, RTOS, embedded device drivers, and test-driven development to build reliable, scalable solutions. His earlier roles at CERN and the Jozef Stefan Institute (Departments for Experimental Particle Physics and Systems and Control) provided hands-on experience with precision instrumentation and rigorous research environments. He earned both a Master's and Bachelor's in Electrical Engineering (Electronics) from the University of Ljubljana, grounding his work in strong fundamentals. Based in Slovenia, he combines entrepreneurial drive with deep technical depth to tackle challenging hardware-software integration problems.
10 years of coding experience
10 years of employment as a software developer
Masters, Electrical Engineering (Electronics), Masters, Electrical Engineering (Electronics) at University of Ljubljana
Github Skills (15)
dub10
vivado10
vhdl9
tcl9
makefile9
lattice9
asic9
hdl9
fpga9
build-system8
firmware8
python7
trigger6
cms4
typescript2
Programming languages (2)
Github contributions (5)
APxL1TAlgoDev/ctp7_hls_proj
Aug 2018 - Oct 2018
Contributions:10 commits, 7 pushes, 1 branch in 1 month
asvetek/ruckus
Aug 2018 - Dec 2019
Vivado build system
Contributions:8 pushes in 1 year 3 months
vivadobuild-systembuild-tool
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